`timescale 1ns / 1ps

module Controller_tb;
    reg [5:0] Op;
    reg [5:0] Funct;
    reg Zero;
    
    wire MemtoReg, MemWrite, PCSrc, ALUSrc;
    wire RegDst, RegWrite, Jump;
    wire [2:0] ALUControl;

    Controller uut (
        .Op(Op), .Funct(Funct), .Zero(Zero),
        .MemtoReg(MemtoReg), .MemWrite(MemWrite),
        .PCSrc(PCSrc), .ALUSrc(ALUSrc),
        .RegDst(RegDst), .RegWrite(RegWrite),
        .Jump(Jump), .ALUControl(ALUControl)
    );

    initial begin
        // 1. lui: lui t0, 0x1234
        Op = 6'b001111; Funct = 6'b000000; Zero = 0; #10;
        
        // 2. addu: addu t1, t2, t3
        Op = 6'b000000; Funct = 6'b100001; Zero = 0; #10;
        
        // 3. add: add t1, t2, t3 
        Op = 6'b000000; Funct = 6'b100000; Zero = 0; #10;
        
        // 4. ori: ori t1, t0, 0xFFFF
        Op = 6'b000000; Funct = 6'b100101; Zero = 0; #10;
        
        // 5. lw: lw t0, 0(t1)
        Op = 6'b000011; Funct = 6'b000000; Zero = 0; #10;
        
        // 6. sw: sw t0, 0(t1)
        Op = 6'b100101; Funct = 6'b000000; Zero = 0; #10;
        
        // 7. beq: beq t0, t1, label (Zero=1)
        Op = 6'b001100; Funct = 6'b000000; Zero = 1; #10;
        
        // 8. Jump: j target
        Op = 6'b000010; Funct = 6'b000000; Zero = 0; #10;
        
        // 9. nop
        Op = 6'b000000; Funct = 6'b000000; Zero = 0; #10;
        
        
    end
endmodule